Study on Test Compaction in High-Level Automatic Test Pattern Generation (ATPG) Platform
نویسندگان
چکیده
منابع مشابه
Study on Test Compaction in High-Level Automatic Test Pattern Generation (ATPG) Platform
Advancements in semiconductor technology are making gate-level test generation more challenging. This is because a large amount of detailed structural information must be processed in the search process of automatic test pattern generation (ATPG). In addition, ATPG needs to deal with new defects caused by process variation when IC is shrinking. To reduce the computation effort of ATPG, test gen...
متن کاملCrosstalk Glitch Fault ATPG with Test Compaction
This work proposes a TPG method for producing maximal crosstalk glitch effect on victim net. Thereafter, the test set is compacted using different implementations of fault-list chaining algorithm.
متن کاملRing Counter Based ATPG for Low Transition Test Pattern Generation
In test mode test patterns are applied in random fashion to the circuit under circuit. This increases switching transition between the consecutive test patterns and thereby increases dynamic power dissipation. The proposed ring counter based ATPG reduces vertical switching transitions by inserting test vectors only between the less correlative test patterns. This paper presents the RC-ATPG with...
متن کاملSynthesis of High-Level Requirements Models for Automatic Test Generation
This paper describes research and development of techniques to support automatic generation of test cases for event-oriented, real-time embedded systems. A consistent suite of test scenarios can assure consistency at all levels of design activities. Although we have developed algorithms designed to generate test scenarios from statebased jiinctional requirements model, their applicability is se...
متن کاملSAT-based Automatic Test Pattern Generation
Due to the rapidly growing size of integrated circuits, there is a need for new algorithms for Automatic Test Pattern Generation (ATPG). While classical algorithms reach their limit, there have been recent advances in algorithms to solve Boolean Satisfiability (SAT). Because Boolean SAT solvers are working on Conjunctive Normal Forms (CNF), the problem has to be transformed. During transformati...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Circuits and Systems
سال: 2013
ISSN: 2153-1285,2153-1293
DOI: 10.4236/cs.2013.44046